
Electronic Devices Architectures for the NANO-CMOS Era: From Ultimate CMOS Scaling to Beyond CMOS Devices
Author(s): Simon Deleonibus
- Publisher: Jenny Stanford Publishing
- Publication Date: 31 Oct. 2008
- Edition: 1st
- Language: English
- Print length: 425 pages
- ISBN-10: 9814241288
- ISBN-13: 9789814241281
Book Description
Editorial Reviews
Review
“This book offers an excellent insight into the micro-to-nano transition that the electronics industry is currently engaged in. The different chapters clearly illustrate the latest stages of evolution of the ‘classical’ silicon transistor and explore next-generation devices which are likely to be its successor. It is an excellent reference for scientists and students interested in the future of electronics.”
―Prof. Jean-Pierre Colinge, Tyndall National Institute, Ireland
“The internationally recognized authors of this book provide a fascinating, information-packed reference for scientists, engineers and students interested in ultimately scaled CMOS and the emerging new ‘Beyond CMOS’ device technologies. By encompassing this broad technological vista in a single volume, the authors provide unique perspectives into the current issues and future challenges facing the semiconductor industry as we expand information-processing technologies to completely new applications.”
―Dr. Jim Hutchby, Semiconductor Research Corporation, USA
“This unique book is a must for everybody active in the field and/or interested in the technology of state-of-the-art and future electronic devices. Great work about small things.”
―Prof. Cor Claeys, IMEC, Belgium
About the Author
Simon Deleonibus (MSc 1979, PhD 1982, Paris University) was with Thomson Semiconducteurs, Grenoble, France, from 1981 to 1986 in device engineering development and then production. In 1986 he was with CEA LETI advanced device and process modules research specialising in CMOS and flash memories applications. From 1998 to 2008 he was the director of the Electronic Nanodevices Laboratory with 55 researchers under his charge. Since 2008, he is the chief scientific director of Silicon Technologies of LETI. He owns the initial patent on contact plug principle, widely used as a standard process by the semiconductor industry. He actualised the first 20-nm gate length MOSFET, the world’s smallest transistor, in June 1999. He is the editor of IEEE Transactions on Electron Devices and a member of the International Technology Roadmap of Semiconductors (ITRS), of the board of directors of the Nanosciences Foundation and of The European Research Council Engineering Panel. A Fellow of the IEEE, he is its distinguished lecturer. He is also the research director of the French CEA.
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