Author(s): Mikhail Baklanov (Editor), Paul S. Ho (Editor), Ehrenfried Zschech (Editor)
Publisher: Wiley
Publication Date: 2 Mar. 2012
Edition: 1st
Language: English
Print length: 608 pages
ISBN-10: 0470662549
ISBN-13: 9780470662540
Book Description
Finding new materials for copper/low-k interconnects is critical to the continuing development of computer chips. While copper/low-k interconnects have served well, allowing for the creation of Ultra Large Scale Integration (ULSI) devices which combine over a billion transistors onto a single chip, the increased resistance and RC-delay at the smaller scale has become a significant factor affecting chip performance.
Advanced Interconnects for ULSI Technology is dedicated to the materials and methods which might be suitable replacements. It covers a broad range of topics, from physical principles to design, fabrication, characterization, and application of new materials for nano-interconnects, and discusses:
Interconnect functions, characterisations, electrical properties and wiring requirements
Low-k materials: fundamentals, advances and mechanical properties
Conductive layers and barriers
Integration and reliability including mechanical reliability, electromigration and electrical breakdown
New approaches including 3D, optical, wireless interchip, and carbon-based interconnects
Intended for postgraduate students and researchers, in academia and industry, this book provides a critical overview of the enabling technology at the heart of the future development of computer chips.
Editorial Reviews
From the Inside Flap
Finding new materials for copper/low-k interconnects is critical to the continuing development of computer chips. While copper/low-k interconnects have served well, allowing for the creation of Ultra Large Scale Integration (ULSI) devices which combine over a billion transistors onto a single chip, the increased resistance and RC-delay at the smaller scale has become a significant factor affecting chip performance.
Advanced Interconnects for ULSI Technology is dedicated to the materials and methods which might be suitable replacements. It covers a broad range of topics, from physical principles to design, fabrication, characterization, and application of new materials for nano-interconnects, and discusses:
Interconnect functions, characterisations, electrical properties and wiring requirements
Low-k materials: fundamentals, advances and mechanical properties
Conductive layers and barriers
Integration and reliability including mechanical reliability, electromigration and electrical breakdown
New approaches including 3D, optical, wireless interchip, and carbon-based interconnects
Intended for postgraduate students and researchers, in academia and industry, this book provides a critical overview of the enabling technology at the heart of the future development of computer chips.
From the Back Cover
Finding new materials for copper/low-k interconnects is critical to the continuing development of computer chips. While copper/low-k interconnects have served well, allowing for the creation of Ultra Large Scale Integration (ULSI) devices which combine over a billion transistors onto a single chip, the increased resistance and RC-delay at the smaller scale has become a significant factor affecting chip performance.
Advanced Interconnects for ULSI Technology is dedicated to the materials and methods which might be suitable replacements. It covers a broad range of topics, from physical principles to design, fabrication, characterization, and application of new materials for nano-interconnects, and discusses:
Interconnect functions, characterisations, electrical properties and wiring requirements
Low-k materials: fundamentals, advances and mechanical properties
Conductive layers and barriers
Integration and reliability including mechanical reliability, electromigration and electrical breakdown
New approaches including 3D, optical, wireless interchip, and carbon-based interconnects
Intended for postgraduate students and researchers, in academia and industry, this book provides a critical overview of the enabling technology at the heart of the future development of computer chips.
About the Author
Mikhail R. Baklanov IMEC, Leuven, BelgiumPaul S. Ho Laboratory for Interconnect and Packaging, University of Texas at Austin, Austin, Texas, USAEhrenfried Zschech Fraunhofer Institute for Nondestructive Testing, Dresden, Germany
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